1. Field of the Invention
The present invention relates generally to the field of semiconductor devices, and more particularly to a fin-shaped structure in a non-planar semiconductor device.
2. Description of the Prior Art
With the increasing miniaturization of semiconductor devices, various multi-gate MOSFET devices have been developed. The multi-gate MOSFETs are advantageous for the following reasons. First, the manufacturing processes of the multi-gate MOSFET devices can be integrated into traditional logic device processes easily, and thus are more compatible. In addition, since the three-dimensional structure of a multi-gate MOSFET increases the overlapping area between the gate and the substrate, its channel region can be controlled more effectively. This therefore reduces drain-induced barrier lowering (DIBL) effect and short channel effect (SCE). Moreover, the channel region is longer for a similar gate length. Therefore, the current between the source and the drain is increased. Besides, there is still a need to increase the density of the semiconductor devices in an integrated circuit.